TESIN
Abstract
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M. Reiche and S. Christiansen
Using transfer techniques (wafer bonding) in combination with hydrogen induced layer splitting sSOI wafers (diameter 200 mm) were successively fabricated. Fig. 1 shows the infrared microscope image of a bonded wafer pair before layer splitting. There are void free interfaces also after different annealing processes. A TEM cross-sectional image of the layer stack after splitting is shown in Fig. 2. The thickness of the strained silicon layer is about 20 nm. The optical image and a TEM cross-sectional image of a final sSOI wafer after the selective etching of the remaining SiGe layer are shown in Figs. 3a and b. The thickness of the transferred strained Si layer is about 20 nm. UV Raman measurements proved that the strain in the Si layer is completely preserved during the process. The resulting strain of ε = -0.66% in the strained silicon layer of the sSOI wafer corresponds to strain measured on the initial virtual substrate (Fig. 4). The strain is also unchanged after an additional annealing at elevated temperatures and an increase of the sSi layer thickness to 60 nm.
Long channel MOSFETs were fabricated on the sSOI substrates by project partners. Measurements of the electron mobility resulted in an enhancement of nearly 100 %. Also the on current showed a large improvement.
Fig. 1: Infrared microscope image of a bonded 200 nm diameter wafer pair. The SiGe virtual substrate covered with an oxide layer was bonded to a Si handle wafer
Fig. 2. TEM cross-sectional image of the stack after layer splitting.
Fig.3a. Optical image of a sSOI wafer
Fig. 3b: TEM cross-sectional image of a sSOI wafer. A thin strained silicon layer, about 20 nm thick, was transferred.
Fig. 4: UV Raman measurements show the peak of the strained silicon at 515.4 cm-1 corresponding to a strain of 0.66%.