Methods to introduce strain in MOSFET channels
There are generally 2 different methods to introduce strain in the channel region: biaxial strain and uniaxial strain. Biaxial strain is also referred to as global strain and is introduced by epitaxial growth of Si and SiGe layers (substrate engineering). The strain is induced by the lattice mismatch between Si and SiGe. The advantages of SOI and biaxially strained silicon layers can be combined in a single substrate of strained silicon on insulator (SSOI). Its application is not limited by further scaling below 32 nm. On the other hand, uniaxial strain is generated by local structural elements near the channel region. Since these process modules that cause uniaxial strain are part of CMOS processes, uniaxial strain is also referred to as process-induced strain (PIS). Owing to the relative ease of integrating process-induced strain modules in conventional CMOS processes, strain enhanced scaling has relied on the development of new advanced methods of PIS. The application of local strain elements, however, is limited by further scaling to 32 nm and below making some of them ineffective or unfeasible. Therefore new methods of strain generation in the transistor channel region are required. One possible option is the combination of global and local strain or, in other words, of biaxial and uniaxial strain.