Silicon nanowires are grown using an ultra high vacuum (UHV) chemical vapor depostion (CVD) system. Anodic aluminum oxide (AAO) templates combined with Si substrate are used for the growth of vertically-aligned epitaxial Si nanowire arrays. The catalyst has a direct interface with the substrate via both the Electroless Depostion and the Bottom Imprint methods. The growth direction of the wires is forced perpendicular to the substrate with the same diameter and ordering as the template structure, and epitaxial wire-on-wire heterostructures are grown with sharp interfaces.
Electroless Depostion method for homo-epitaxial growth of Si nanowires on Si (100) substrate
Homo-epitaxial growth of Si nanowires on Si (100) substrate was accomplished using a combination of Anodic Aluminum Oxide (AAO) templates and Vapor-Liquid-Solid (VLS) growth. At first the AAO template was formed on the Si substrate (i). Then the alumina barrier layer that existed at the bottom of the nanoholes and the native oxide on the Si substrate were removed by chemical etching without loosing the connection between AAO template and Si substrate(ii-iii). Then catalytic gold nanoparticles for the VLS growth of Si nanowires were deposited directly onto the Si substrate at the bottom of the AAO nanopores by electroless plating (iv). The Si nanowires were synthesized by an ultra high vacuum chemical vapor deposition (UHV-CVD) facility using silane gas as a precursor (v).
Using this method, epitaxial Ge/Si wire-on-wire heterostructures were achieved. The interface between Ge and Si has a distinct convex shape which has not been reported in previous studies of Ge/Si nanowire growth.
Bottom Imprint method for epitaxial growth of Si nanowires
The bottom imprint (BI) approach directly uses highly ordered AAO membranes (Ⅰ-Ⅱ) working as both the imprint stamp and the growth template for epitaxial Si nanowire growth. The thin AAO membrane is filled and covered with polymer (PS) (Ⅲ) a short time after the second anodization. Then the remaining aluminium and the barrier layer are etched away (Ⅳ). The thin AAO membrane is bonded (V) on a Si substrate covered with an Au catalyst film for hot embossing (Ⅵ). The PS inside the pores is removed by organic solution (VII) before the UHV-CVD process (VIII).
The high degree of ordering of the AAO membranes is caused by a long-time first anodization. The width of the size distribution of the Si nanowires grown epitaxially (Ⅷ) is below 10 % (FWHM). The protective polymer layer (PS) avoids oxidation. The newly presented approach has also successfully been applied to Si (111) and Al catalyst, and is thus of general interest.
Scanning electron microscope (SEM) image of the vertically grown epitaxial Si (100) nanowire arrays after etching of the AAO template by electroless depostion of Au.
Scanning electron microscope (SEM) image of the vertically grown epitaxial Si (100) nanowire arrays after etching of the AAO template using bottom imprint (BI) method with Au.
(a) HR-TEM image of Ge/Si nanowire at the interface between Ge and Si. (b) FFT-filtered image of the interface shown in Figure 4 a. "T" symbols indicate positions and orientations of dislocations.